Here you have the chance to get a look into my lecture Control System II at Technische Hochschule L\u00fcbeck. Caused by 2020-Corona I was forced to create an online lecture, which is realized in several movies published on Youtube. But you need additionally my papers, which are prepared to download here.<\/p>\n
Because this is the second part of Control System lecture, here you can have a download possibility of material for the first course, which is not available as Youtube- videos. Maybe it will be created in Winter semester if problems still exists –> but hopefully not!<\/p>\n
Workbook Control System I <\/a>– contains the transparencies of lecture<\/p>\n Student Paper Control System I<\/a>\u00a0 – contains a complete copy of that what I have written on board, but without complete text.<\/p>\n Workbook control system II<\/a> – Base for the lecture which will be presented piece by piece in the following videos<\/p>\n Here the lecture – videos:<\/p>\n 1 CSII chap 6 Intro Link<\/a> Chapter 7 Z-transformation<\/b><\/p>\n 16 CSII chap 7 T1 Transfer function F(z) <\/span>Link<\/span><\/a> Chapter 8 Identification of processes<\/b><\/p>\n CSII 23 chap 8 T1\u00a0 8.1.a Intro and PT1\u00a0 Link<\/span><\/a> Chapter 9 Special controllers<\/b><\/p>\n CSII 36 chap 9 T1 Dead Beat controller <\/span>Link<\/span><\/a> Now Lecture is complete<\/b>d.<\/b><\/p>\n<\/div>\n signed : Prof. Dr. Bayerlein –\u00a0 TH L\u00fcbeck<\/p>\n <\/p>\n","protected":false},"excerpt":{"rendered":" Here you have the chance to get a look into my lecture Control System II at Technische Hochschule L\u00fcbeck. Caused by 2020-Corona I was forced to create an online lecture, which is realized in several movies published on Youtube. But you need additionally my papers, which are prepared to download here. Because this is the […]<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":18,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-625","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=\/wp\/v2\/pages\/625","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=625"}],"version-history":[{"count":15,"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=\/wp\/v2\/pages\/625\/revisions"}],"predecessor-version":[{"id":703,"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=\/wp\/v2\/pages\/625\/revisions\/703"}],"up":[{"embeddable":true,"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=\/wp\/v2\/pages\/18"}],"wp:attachment":[{"href":"https:\/\/www.joergbayerlein.de\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=625"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}
\n2 CSII chap 6 Conversion P and I\u00a0 Link<\/a>
\n3 CSII chap 6 Recurcive PI Algorithm Link<\/a>
\n4 CSII chap 6 Comparison of PI analog and digital Link<\/a>
\n5 CSII chap 6 Analog Control loop simulation Link<\/a>
\n6 CSII chap 6Digital loop simulation with Windfc# Link<\/a>
\n7 CSII chap 6.2.4 ff D-Part Conversion of a PID Link<\/a>
\n8 CSII chap 6.3-6.4 Exercise and programming of PID Link<\/a>
\n9 CSII chap 6.5 Choices of To two upper limits Link<\/a>
\n10 CSII chap 6.5 rest 3 lower limits Link<\/a>
\n11 CSII chap 6.6+6.7 st-approx Link<\/a>
\n12 CSII chap 6.7.2 S&H-Block Link<\/a>
\n13 CSII chap 6 finish Link<\/a>
\n14 CSII chap 6 Example PIDT1 design with RegC# Link<\/a>
\n15 CSII chap 6 Example simulation with WindfC# Link<\/a><\/p>\n
\n17 CSII chap 7 T2 Conversion of F(p) into F(z) <\/span>Link<\/span><\/a>
\n18 CSII chap 7 T3 Step response invariant filter <\/span>Link<\/span><\/a>
\n19 CSII chap 7 T4 Rectangular and trapezoidal approach <\/span>Link<\/span><\/a>
\n20 CSII chap 7 T5 Demo Windfc# + Digital filters <\/span>Link<\/span><\/a>
\n21 CSII chap 7 T6 Chap 7.4 Improved PIDT1- design <\/span>Link<\/span><\/a>
\n22 CSII chap 7 T7 Overview and Antiwindup <\/span>Link<\/span><\/a><\/p>\n
\nCSII 24 chap 8 T2\u00a0 8.1.a PT1 without final value\u00a0 <\/span>Link<\/span><\/a>
\n(now created with old Dell Venue 11)<\/span>
\nCSII 25 chap 8 T3\u00a0 8.1 completed <\/span>Link<\/span><\/a>
\nCSII 26 chap 8 T4\u00a0 8.1 Demo with 3PT1 process <\/span>Link<\/span><\/a>
\nCSII 27 chap 8 T5\u00a0 8.2 Least square regression method <\/span>Link<\/span><\/a>
\nCSII 28 chap 8 T6\u00a0 8.2 Demo Windfc# Link<\/span><\/a>
\nCSII 29 chap 8 T7\u00a0 8.2 Demo RSR with 8.2 Link<\/span><\/a>
\nCSII 30 chap 8 T8\u00a0 Chap 8.3 <\/span>Link<\/span><\/a>
\nCSII 31 chap 8 T9\u00a0 Demo 8.3<\/span>Link<\/span><\/a>
\nCSII 32 chap 8 T10 Chap 8.4 IDA <\/span>Link<\/span><\/a>
\nCSII 33 chap 8 T11 Chap 8.5 LS Off <\/span>Link<\/span><\/a>
\nCSII 34 chap 8 T12 Chap 8.5 end start 8.6 <\/span>Link<\/span><\/a>
\nCSII 35 chap 8 T13 8.6 Demo <\/span>Link<\/span><\/a><\/p>\n
\nCSII 37 chap 9 T2 PT1 example <\/span>Link<\/span><\/a>
\nCSII 38 chap 9 T3 Delayed PT1 and DB(v+1) <\/span>Link<\/span><\/a>
\nCSII 39 chap 9 T4 Demo PT1 and theory 2PT1 process <\/span>Link <\/span><\/a>
\nCSII 40 chap 9 T5 Demo DBC with 2PT1 with limitation <\/span>Link<\/span><\/a>
\nCSII 41 chap 9 T6 9.6 Orientation controller <\/span>Link<\/span><\/a>
\nCSII 42 chap 9 T7 9.7.2 Modified Dead Beat (DB-Bay) <\/span>Link<\/span><\/a>
\nCSII 43 chap 9 T8 Demo of DB-Bay m=1 + delay Smith predictor <\/span>Link<\/span><\/a>
\nCSII 44 chap 9 9.7.3 DB-Bay m=2 + Demo <\/span>Link<\/span><\/a>
\nCSII 45 chap 9 9.7.4 DB-Bay m=3 + Demo<\/span>Link<\/span><\/a>
\nCSII 46 chap 9 9.7.5 PFC Theory of Mr. Richalet part1 <\/span>Link<\/span><\/a>
\nCSII 47 chap 9 9.7.5 PFC Theory of Mr. Richalet part2 <\/span>Link<\/span><\/a>
\nCSII 48 chap 9 Demo PT1 process Comparision of PI, DB Bay and PFC\u00a0 <\/span>Link<\/span><\/a>
\nCSII 49 chap 9 2PT1- PFC with Demo <\/span>Link<\/span><\/a>
\nCSII 50 chap 9 T15 9.8.1 Disturbance measurement with software <\/span>Link<\/span><\/a>
\nNote to CSII 50: The disturbance measurement in WindfC# is only available in DB-Bay- Controller.<\/span>
\nCSII 51 chap 9 T16 9.8.3 PFC for an IT1-process <\/span>Link<\/span><\/a>
\nCSII 52 chap 9 T17 Simulation of IT1- control <\/span>Link<\/span><\/a>
\nCSII 53 chap 9 T18 9.12 PFC behaves like PI <\/span>Link<\/span><\/a>
\nCSII 54 chap 9 T19 9.13 Disturbance compensation PT1 case <\/span>Link<\/span><\/a>
\nCSII 55 chap 9 T20 9.13 Disturbance compensation 2PT1 and IT1 case <\/span>Link<\/span><\/a>
\nCSII 56 chap 9 T21 3PT1- process with all digital controllers Link<\/a><\/span><\/p>\n